NXP Semiconductors /MIMXRT1062 /IOMUXC /SW_MUX_CTL_PAD_GPIO_B0_07

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Interpret as SW_MUX_CTL_PAD_GPIO_B0_07

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALT0)MUX_MODE 0 (DISABLED)SION

MUX_MODE=ALT0, SION=DISABLED

Description

SW_MUX_CTL_PAD_GPIO_B0_07 SW MUX Control Register

Fields

MUX_MODE

MUX Mode Select Field.

0 (ALT0): Select mux mode: ALT0 mux port: LCD_DATA03 of instance: lcdif

1 (ALT1): Select mux mode: ALT1 mux port: QTIMER3_TIMER1 of instance: qtimer3

2 (ALT2): Select mux mode: ALT2 mux port: FLEXPWM2_PWMB00 of instance: flexpwm2

3 (ALT3): Select mux mode: ALT3 mux port: ARM_TRACE3 of instance: cm7_mx6rt

4 (ALT4): Select mux mode: ALT4 mux port: FLEXIO2_FLEXIO07 of instance: flexio2

5 (ALT5): Select mux mode: ALT5 mux port: GPIO2_IO07 of instance: gpio2

6 (ALT6): Select mux mode: ALT6 mux port: SRC_BOOT_CFG03 of instance: src

8 (ALT8): Select mux mode: ALT8 mux port: ENET2_TX_ER of instance: enet2

SION

Software Input On Field.

0 (DISABLED): Input Path is determined by functionality

1 (ENABLED): Force input path of pad GPIO_B0_07

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